Technical Field
Embodiments of the present disclosure are generally directed to semiconductor packages and methods in which one or more electrical components are positioned on a QFN leadframe and positioned between a semiconductor die and the leadframe.
Description of the Related Art
Semiconductor packages, such as system in package (SiP) devices come in m any forms, including ball grid array (BGA) packages, land grid array (LGA) packages, and quad flat no-lead (“QFN”) packages.
QFN packages are common in the packaging space because of their small size and excellent performance for many applications. These packages include leadframes having a back surface of a die pad exposed on a back of the package. Leads are also exposed on the back of the package and are spaced apart from and surrounding the die pad. Within the package, the leadframes support a die in a central position and often include wire bonds from the die to the leads. A molding compound or sealant is formed over the die, the wires, and the leadframe to complete the package.
Conventional QFN packages are generally limited in terms of available space, which limits the number of components that can be integrated in such packages. Moreover, the lead pitch of standard QFN leadframes typically doesn't match with the dimensions of surface mounted devices (SMDs), which limits or prohibits mounting of such SMDs on a QFN leadframe. Instead, in order to integrate SMDs in a QFN package, the size of the package in conventional designs is typically increased.